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Why parallel sums disagree: tracing FP32 reduction order
Two correct addition orders return zero and one for inputs whose exact sum is two. Enumerating every input order reveals the numerical contract.
CPU FP32 rounding illustration with exact chosen inputs; not a device race test or GPU benchmark.
serial=1.0 tree=0.0 reference=2.0 serial=2.0 tree=2.0 reference=2.0 Rounding-order demonstration, not a GPU reduction benchmark. Distinct input permutations: 12 Serial outcomes: [0.0, 1.0, 2.0] pairwise outcomes: [0.0, 2.0]
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